Advanced Encryption Standard (AES) instructions set
AES instructions operate on XMM registers to provide accelerated primitives for block encryption/decryption using Advanced Encryption Standard (AES). The purpose of the instruction set is to improve the speed of applications performing encryption and decryption using the AES.
Tip: For detailed information about each instruction please read: Intel Architectures Software Developer’s Manual Volume 2: Instruction Set Reference, A-Z
| Instruction | Meaning |
|---|---|
| VAESENC | Perform an AES encryption round using an 128-bit state and a round key |
| VAESDEC | Perform an AES decryption round using an 128-bit state and a round key |
| VAESENCLAST | Perform the last AES encryption round using an 128-bit state and a round key |
| VAESDECLAST | Perform the last AES decryption round using an 128-bit state and a round key |
| VAESIMC | Perform an inverse mix column transformation primitive |
| VAESKEYGENASSIST | Assist the creation of round keys with a key expansion schedule |
| VPCLMULQDQ | Perform carryless multiplication of two 64-bit numbers |